The efficient deployment of complex neural networks on modern edge and embedded hardware presents a key challenge. Here, unique opportunities await you to overcome this bottleneck and actively shape the future of AI deployment. Are you ready to make a decisive contribution with your thesis and redefine the boundaries of what is technically feasible?

• During your Thesis, you delve deeply into current research, analyzing state-of-the-art optimization strategies for the deployment of neural networks to assess their suitability for efficient HW/SW co-design.
• Furthermore, you develop an innovative mathematical framework to formally verify numerical tolerance limits for neural network operations, thereby establishing a new verification metric.
• You evaluate the complex interplay between hardware acceleration and numerical stability to identify and integrate optimal trade-offs.
• Lastly, you document your research findings with precision and present them persuasively to the team, actively fostering technical exchange.

• Education: Studies in the field of Electrical Engineering, Computer Science, or comparable
• Experience and Knowledge: strong experience in Python/C++, neural network compiler (TVM), basic hardware knowledge, Deep Learning Concepts, Linux, LaTeX
• Personality and Working Practice: you possess a strong inventive spirit and have the desire to discuss and communicate complex research topics in a global environment.
• Work Routine: office attendance required
• Languages: good in English